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Overview

This document traces a single CME market data packet through the NanoARB system, from raw UDP bytes to a trading decision and order submission. Understanding this data flow is critical for:
  • Performance optimization - Identifying latency bottlenecks
  • Debugging - Tracing data transformations
  • Strategy development - Knowing when your code gets called
  • Feature extraction - Understanding available data at each stage

End-to-End Latency Budget

From README.md (lines 221-228), the complete tick-to-trade latency:
Let’s examine each stage in detail.

Stage 1: Market Data Ingestion

1.1 UDP Packet Reception

Where: Network interface (kernel/user space) What happens:
  1. CME multicast packet arrives on configured interface (e.g., eth0)
  2. Kernel copies packet to socket buffer
  3. Application reads packet via tokio::net::UdpSocket
Data format: SBE (Simple Binary Encoding) binary protocol

1.2 SBE Decoding

Where: nano-feed/src/parser.rs:1 Function: MdpParser::parse()
Key optimization: Zero-copy parsing with nom combinators
Output: MdpMessage::BookUpdate
Latency: ~20-30ns for typical 46-byte message

Stage 2: Order Book Update

2.1 Book Reconstruction

Where: nano-lob/src/orderbook.rs:1 Function: OrderBook::apply_update()
Data structure: BTreeMap<Price, Quantity> Why BTreeMap?
  • O(log n) insert/delete
  • Ordered iteration (best bid/ask at min/max)
  • Cache-friendly for small sizes
Book state after update:
Latency: 45ns median (P95: 62ns)

2.2 Snapshot Capture

Where: nano-lob/src/snapshot.rs:1 Function: SnapshotRingBuffer::push()
Purpose: Maintain 100-tick history for sequence model input Memory layout: Stack-allocated, cache-friendly

Stage 3: Feature Extraction

3.1 LOB Features

Where: nano-lob/src/features.rs:1 Function: LobFeatureExtractor::extract_all()
Feature vector (40 dimensions):

3.2 Key Feature Calculations

Microprice

Definition: Volume-weighted mid price
Example:

Order Flow Imbalance (OFI)

Definition: Net change in bid vs ask volume
Interpretation:
  • OFI > 0: More buying pressure (bullish)
  • OFI < 0: More selling pressure (bearish)

VPIN (Volume-Synchronized Probability of Informed Trading)

Definition: Imbalance in signed volume
Range: [0, 1], higher values indicate more informed trading Latency for all features: 120ns median (P95: 145ns)

Stage 4: ML Model Inference

4.1 Input Preparation

Where: nano-model/src/lib.rs Function: SignalModel::predict() Input shape: (batch=1, seq_len=100, features=40)
Tensor layout:

4.2 Mamba Model Architecture

From README.md (lines 295-323):
Why Mamba?
  • 10-50x faster than Transformers (no quadratic attention)
  • Better at long sequences (100+ timesteps)
  • State space models capture temporal dynamics
  • Sub-microsecond inference

4.3 Output Interpretation

Output shape: (1, 3, 3) = (batch, horizons, classes)
Signal extraction:
Latency: 580ns median (P95: 720ns, P99: 890ns)

Stage 5: Strategy Decision

5.1 Market Maker Quote Calculation

Where: nano-strategy/src/market_maker.rs:1 Function: MarketMakerStrategy::on_market_data()
Example calculation:
Interpretation:
  • ML signal is bullish, so both quotes shifted up by $0.50
  • Long position (+10), so quotes shifted down by $1.25 to reduce inventory
  • Net effect: Willing to sell at higher price, buy at fair value
Latency: 35ns (pure computation, no I/O)

5.2 Risk Checks

Where: nano-backtest/src/risk.rs:1 Function: RiskManager::check_order()
Checks performed:
  1. Position limit (e.g., max ±50 contracts)
  2. Order size (e.g., max 10 per order)
  3. Drawdown threshold (e.g., max 6% from peak)
  4. Daily loss limit (e.g., max $100k per day)
If any check fails, order is rejected and strategy is notified.

Stage 6: Order Submission

6.1 Event Scheduling

Where: nano-backtest/src/engine.rs:215 Function: BacktestEngine::on_market_data()
Latency simulation:
Example:

6.2 Exchange Matching

Where: nano-backtest/src/execution.rs:1 Function: SimulatedExchange::submit_order()
Queue position estimation:
Fill simulation:

6.3 Fill Notification

Where: nano-backtest/src/engine.rs:240
Position update:

Complete Event Timeline

Putting it all together, here’s a complete tick-to-trade timeline:
Total latency from tick to order: 780ns (within budget) Total latency from tick to acknowledgment: ~100μs (network latency) Total latency from tick to fill: ~500μs (depends on market)

Performance Profiling

Benchmarking Individual Components

Each crate includes Criterion.rs benchmarks:
Sample output:

Flamegraph Generation

For detailed profiling:
Typical flamegraph shows 75% of time in ML inference, 15% in feature extraction, 10% in other.

Optimization Techniques

1. SIMD Vectorization

Feature extraction uses SIMD for parallel computation:

2. Lock-Free Data Structures

Crossbeam channels for inter-thread communication:

3. Memory Pooling

Pre-allocate objects to avoid allocation overhead:

4. Compile-Time Optimizations


Monitoring & Debugging

Tracing Events

Structured logging throughout the pipeline:
Output (JSON format for log aggregation):

Metrics Export

Prometheus metrics at http://localhost:9090/metrics:

Next Steps